Research Notes

Research Notes

When thinking about topics to review in preparation for 1. performing the research work and 2. writing the thesis, the following came to mind as potential chapters:

  • Basic structure of a compiler, i.e. compiler phases
  • Classes of grammars

Other items to consider:

  • Adding the MiniJava BNF grammar as an appendix

It seems that the ConcurrentMiniJava compiler is layed out such that each phase can stand alone. The parser is quite complex, but still modular. It contains JavaCC parser generator files to create parsers to accept each previous phase of the compiler. No doubt, this is to assist students who are unable to complete a particular phase. I should know, I was one of those students :)

According to the ARM Compiler toolchain: Using the Assembler reference document, the target ARM-based architecure has 30 general-purpose 32 bit registers. However, only the first 16 are available in user-level mode. They are as follows:
Register Name Purpose
R0 - General Purpose / Return Value
R1 - General Purpose / Parameter
R2 - General Purpose / Parameter
R3 - General Purpose / Parameter
R4 - General Purpose
R5 - General Purpose
R6 - General Purpose
R7 - General Purpose
R8 - General Purpose
R9 - General Purpose
R10 - General Purpose
R11 FP Frame Pointer
R12 IP Intra Procedural Call
R13 SP Stack Pointer
R14 LR Link Register
R15 PC Program Counter
CPSR - Current Program Status Register

See this link for more info.

Some basic Arm instructions seen in COSC 2200 assignments:
Instruction Name Usage
Arithmetic
add Add Add two integers
sub Subtract Subtract two integers
mul Multiply Multiply two integers
div Divide Divide two integers
Register Manipulation
ldr Load word Load a register with some value from a memory address
str Store word Store the value inside a given register into a memory address
mov Move Move an immediate value into a register
push Push Push a list of registers onto the Stack
pop Pop Pop a list of registers off of the Stack
Logical Operators
cmp Compare Compare the contents of a register with some value
beq Branch if equals Branch to some label if the status register indicates the result of a cmp is equal
bgt Branch if greater than Branch to some label if the status register indicates the result of a cmp is greater than
blt Branch if less than Branch to some label if the status register indicates the result of a cmp is less than
bl Branch and link
b Branch Branch to some label
Some realizations about the existing MIPS code is that in code emission, registers are given placeholder "template" values, which then later get resolved to real register values. I am still unsure how it will work when emitting code for a function. There will need to be some sort of push/pop handling.